(8.D.2.6) BufferDownV2
- Catherine Spain
Overview
Ends a layout and returns to the original clock divider
Discussion
The BufferDownV2 module is used to implement multi-layouting and is used in conjunction with the BufferUpV2 module. The BufferDownV2 module terminates a layout and returns processing to a layout with a lower clock divider (higher priority, smaller block size).
The module supports multiple input and output pins and all downstream modules will be in the new layout. The input wires must all be in the same clock divider, but they can all have different sizes, sample rates, and data types. All output wires are returned to the same base layout.
The module allows you to decrease the clock divider by an integer factor bufferDownFactor (BUFFER_DOWN_FACTOR). This causes the output block size to decrease by bufferDownFactor as well. Smaller clock dividers end up going into higher priority layouts.
The module also allows you to specify the output layoutSubID (LAYOUT_SUB_ID). The layoutSubID allows you to run multiple layouts at the same clockDivider but in different layouts. For example, you might have multiple layouts all at a clock divider of 1 operating in a SMP core system. Whereas V1 of this module will force all processing for a particular clockdivider value into the base layout for that clockdividier, V2 allows separate layouts within the same clockdivider for more advanced multicore implementations.
This module introduces a sample latency of the input pin's block size.
Type Definition
-Not Shown-
Pins
Input Pins
Name: in1
Description: audio input
Data type: {float, int, fract32}
Channel range: Unrestricted
Block size range: Unrestricted
Sample rate range: Unrestricted
Complex support: Real and Complex
Output Pins
Name: out1
Description: audio output
Data type: {float, int, fract32}
MATLAB Usage
File Name: buffer_down_v2_subsystem.m
SYS = buffer_down_v2_subsystem(NAME, NUMPINS, BUFFER_DOWN_FACTOR, LAYOUT_SUB_ID)
This module helps to manage layouts in Audio Weaver. It returns a (new)
layout back down to the original clock divider. This differs from V1 in that
multiple layouts are assignable per clock divider.
Arguments:
NAME - name of the module.
NUMPINS - number of pins on input and output
BUFFER_DOWN_FACTOR - the output layout can run at a smaller clock divider
(block size) compared to the input layout. BUFFER_DOWN_FACTOR is the
divider factor which connects the input and output:
outputBlockSize = inputBlockSize / BUFFER_DOWN_FACTOR
outputClockDivider = inputClockDivider / BUFFER_DOWN_FACTOR
By default, BUFFER_DOWN_FACTOR=1. BUFFER_DOWN_FACTOR must be chosen so that
the output blockSize is an integer and the output clockDivider is an
integer.
LAYOUT_SUB_ID - allows you to specify which layout will be used to process
the output clockDivider. This is empty by default, which indicates that
the base layout at the specified clockDivider is used. The base layout
has sublabel = 0. The sublabel is an integer in the range [0 15] which
provides finer control over which layout to join. By default,
LAYOUT_SUB_ID=[], which caused 0 to be used.Â