(8.D.1.2) BufferUpV2
Overview
Creates a new layout (HW or SW) on the target
Discussion
This modules creates a new layout inside of Audio Weaver and is used in conjunction with the BufferDownV2 module. All of the downstream modules connected to the output pin will be in the new layout. The new layout continues until you reach the BufferDownV2 module or the system output pin.
The module supports multiple input and output pins. The input wires must all be in the same clock divider, but they can all have different sizes, sample rates, and data types.
The module allows you to increase the clock divider by an integer factor (bufferUpFactor). This causes the output block size to increase by bufferUpFactor as well. Larger clock dividers end up going into lower priority layouts.
The module also allows you to specify the output layoutSubID. The layoutSubID allows you to run multiple sets of modules at the same clockDivider but in different layouts. For example, you might have multiple layouts all at a clock divider of 1 operating in a SMP core system. When using Designer, layoutSubID is selected in a droplist to be 'A' to 'P' which corresponds to 16 unique layouts. When using Matlab scripts, layoutSubID is an integer in the range [0 15] which maps directly to [A P].
Layouts are specified using a combination of bufferUpFactor and layoutSubID. The system input pin is always in layout 1A. The system output pin can be on any of the clockDivider 1 layouts (1A, 1B, etc.). If you want multiple layouts all at the same block time as the input pin, then select 1B, 1C, and so forth.
The BufferUpV2 module allows you to buffer up into a larger block size that gets processed in a lower priority layout. For example, layout 2A (as well as 2B, 2C, etc.) operate at twice the block time of the system input pin. V1 of this module will force all audio paths of the same clockdivider to the same layout, whereas V2 allows different layouts to be assigned to audio paths with the same clockdivider value.
This module introduces a sample latency of bufferUpFactor times the input pin's block size
Type Definition
-Not Shown-
Pins
Input Pins
Name: in1
Description: audio input
Data type: {float, int, fract32}
Channel range: Unrestricted
Block size range: Unrestricted
Sample rate range: Unrestricted
Complex support: Real and Complex
Output Pins
Name: out1
Description: audio output
Data type: {float, int, fract32}
MATLAB Usage
File Name: buffer_up_v2_subsystem.m
SYS = buffer_up_v2_subsystem(NAME, NUMPINS, BUFFER_UP_FACTOR, LAYOUT_SUB_ID)
Creates an audio module which causes a new layout to be created.
The new layout is at the block size and clockdivider
This differs from v1 in that only v2 allows different
layouts to be used for sections with the same clock divider.
NAME - name of the module.
NUMPINS - number of pins on input and output
BUFFER_UP_FACTOR - the output layout can run at a larger clock divider
(block size) compared to the input layout. BUFFER_UP_FACTOR is the
multiplicative factor which connects the input and output:
outputBlockSize = inputBlockSize * BUFFER_UP_FACTOR
outputClockDivider = inputClockDivider * BUFFER_UP_FACTOR
By default, BUFFER_UP_FACTOR=1.
LAYOUT_SUB_ID - allows you to specify which sublayout ID will be used to process
the output clockDivider. By default, this is empty which indicates that
the base layout at the specified clockDivider is used. The base layout
has sublabel = 0. The sublabel is an integer in the range [0 15] which
provides finer control over which layout to join. By default,
LAYOUT_SUB_ID=[], which causes 0 to be used.
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