Overview

Efficient filterbank based FIR filter

Discussion

DSP Concepts Proprietary IP.

This module implements a long FIR filter using filterbank processing. This yields a significant reduction in the processing load and allows much longer filters to be implemented. The filterbank reduces computation by breaking a large convolution into multiple smaller independent convolutions. The implementation supports mono audio channels and the blockSize must be a power of 2.

When you instantiate the module you specify the blockSize and the length of the filter L. The larger the blockSize the more efficient the processing. The latency through the filter is zero and is numerically equivalent to having a time domain FIR filter.

On the Inspector (or Numeric Inspector) you specify the time domain FIR filter coefficients. The module will automatically take care of converting the time domain coefficients into the appropriate frequency domain coefficients. For ease of use, it is better to use the Numeric Inspector and then load the coefficients from a text file.

On the ADI SHARC+ platforms, except ADSP-2157x and ADSP-2158x, the module make use of FIR Accelerators, in legacy mode, to optimize the processing time. On SHARC+ processor, additional memory is allocated for accelerator TCB with size of numAcceleratorChannels*13. The processing load is distributed as 1 channel processing in FIRA is equivalent to 3 channel core processing. i.e. the FIRA channels=floor((numChannels/5)*2). As the accelerators access data by DMA, when the dm and pm caches are enabled, extra cycles are needed to maintain cache coherence. It is highly recommended to increase the allocation priority of this module instance in the signal flow to have a larger chance to allocate in the AWE fast heaps. In this way, the overhead from accelerator can be minimized. If any of this module instances allocated in the AWE slow heap, please note that the CPU load might be higher than without FIRA due to cache coherence maintenance. Maximum number of channels that can be processed in FIR Accelerator is limited to 32 and the remaining channels are processed by the core. i.e. FIRA channels=min(floor((numChannels/5)*2), 32)

On the processors of 2159x where 2 FIR accelerators are available with dual SHARC+ cores, two FIR accelerators are used which further reduces the processing load of multiple channels with 4 channels can be processed in parallel with 1 channel processing in the core. i.e. the FIRA channels=floor((numChannels/5)*2). Please note that this module is not multi-core safe i.e. same module can not be used in Sharc1 and Sharc2 at the same time.

Type Definition

typedef struct _ModuleFilterbankFIRNChan
{
    ModuleInstanceDescriptor instance;            // Common Audio Weaver module instance structure
    INT32 numBlocks;                              // Length of each complex FIR filter
    INT32 numTaps;                                // Length of time domain coefficients
    INT32 disableAccelerators;                    // User options for future use
    INT32 stateIndex;                             // Write index in to current complex state variables
    FLOAT32* coeffs;                              // Time domain filter coefficients
    FLOAT32* modInCoeffs;                         // Forward modulation coefficient array
    FLOAT32* modOutCoeffs;                        // Inverse modulation coefficient array
    void * fft_hardware_specific_struct_pointer;  // This may point to a struct that varies based on the target platform
    void * fft_size_aligned_io_buffer_pointer;    // This points to a buffer which is aligned by fft size
    void * fft_twiddle_buffer_pointer;            // This points to twiddle buffer
    void * ifft_hardware_specific_struct_pointer; // This may point to a struct that varies based on the target platform
    void * ifft_size_aligned_io_buffer_pointer;   // This points to a buffer which is aligned by fft size
    void * ifft_twiddle_buffer_pointer;           // This points to twiddle buffer
    float ** filterBankState;                     // Array of pointers to filter bank states
    float ** filterBankCoeffs;                    // Array of pointers to filter bank coeffs
    void * hardware_specific_struct_pointer;      // This is the internal TCB array used for ADI FIR accelerator
} ModuleFilterbankFIRNChanClass;

Variables

Properties

Pins

Input Pins

Name: in

Description: Time domain input

Data type: float

Channel range: Unrestricted

Block size range: 256

Sample rate range: Unrestricted

Complex support: Real

Output Pins

Name: out

Description: Time domain output

Data type: float

Scratch Pins

Channel count: 1

Block size: 514

Sample rate: 48000

MATLAB Usage

File Name: filterbank_firnchan_module.m

 M = filterbank_firnchan_module(NAME, L, NUMCHANNELS, BLOCKSIZE, DISABLE_ACCELERATORS)
 Creates a subsystem which implements a long FIR filter efficiently using
 a filterbank based algorithm.  Arguments:
  NAME - name of the subsystem
  L - length of the time domain FIR filter
  NUMCHANNELS - number of channels for the module.
  BLOCKSIZE - block size of the processing
  DISABLE_ACCELERATORS - to disable accelerators on Sharc+.
                         Default enabled.
 The function internally uses a combination of Audio Weaver blocks
 in order to achieve the desired filtering.  The input and output
 audio are mono.