You may encounter a situation where you want to delay the action of a control signal by a fixed or variable amount of time. As control signals typically are processed at a slower rate than audio in your design, running the control signal through a delay block running at the native sampling rate will use an unnecessarily large amount of RAM unless you configure the delay to operate at the same lower sample rate and block size as the control signal itself.
Example 1: Using a control signal coming in on the input pin
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In this example, the control signal which we wish to delay at a lower sample rate is coming in on the layout’s input pin on channel 2 at 48 kHz with a block size of 32. Channel 1 carries the audio data which will have its gain adjusted by the delayed control signal.
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The accumulated delay in this example is 6591 samples @ 1500 Hz or 4.394 seconds. The Delay itself contributes 4.267 seconds, so the delay contribution of the additional processing is about 0.127 seconds.
Example 2: Using a control signal coming from a DC Source.
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This is very much like the first example, with the exception that we set the DC Source to run at 1500 Hz (input sample rate/input block size) with a Block Size of 1, so the first BlockStatistics module is not needed.
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Options and considerations:
You can use IIR based decimators and interpolators instead of FIR based ones. These will have different resource requirements (RAM, CPU load) and latency.
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